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  bulletin i27180 19 - sept PIIPM30P06D009 programmable isolated ipm pi-ipm features: power module: ? npt igbts 30a, 600v ? 10us short circuit capability square rbsoa low vce (on) (2.05vtyp @ 30a, 25c) positive vce (on) temperature coefficient ? gen iii hexfred technology low diode v f (1.34vtyp @ 30a, 25c) soft reverse recovery ? 5m ? sensing resistors on all phase outputs thermal coefficient < 50ppm/c embedded driving board ? programmable 40 mips dsp ? current sensing feedback from two phases ? full protection from ground and line to line faults ? uvlo, ovlo on dcbus voltage ? embedded flyback smps for floating stages (single 15vdc @ 300ma input required) ? asynchronous isolated 2.5mbps serial port for dsp communication and/or programming ? synchronous isolated 10mbps serial port for dsp communication and/or programming ? ieee standard 1149.1 (jtag port interface) for program downloading and debugging ? separated turn on / turn off outputs for igbts di/dt control ? hall effect sensors, sin/cos and quadrature encoder interfaces ? on board 64kbits i 2 c eeprom description the PIIPM30P06D009 is a fully integrated intelligent power module for high performances servo motor driver applications. the device core is a state of the art dsp, the tms320lf2406a at 40 mips, interfaced with a full set of peripherals designed to handle all analog feedback and control signals needed to correctly manage the power section of the device. a 64kbits eeprom is also available to store calibration data. the piipm has been designed and tailored to implement internally all functions needed to close the current, speed and position loops of a high performances servo motor driver. the use of the flash memory version of the dsp and the jtag port connector allows the user to easily develop and download his own proprietary algorithm. package: piipm ? bbi (econopack 2 outline compatible) power module schematic: out 1 out 2 out 3 in1 in2 in3 dc+ out dc+ in brk dc- dc- (signal) dc+ (signal) input bridge, brake and three phases inverter (bbi) with current sensing resistors on all output phases and thermistor PIIPM30P06D009 system block schematic: piipm30p12d009 the device comes in the emp tm package, fully compatible in length, width and height with the popular econopack 2 outline
www.irf.com page 2 pipm 30 p 06 d 009 i271 80 1 9 s e p t embedded driving board block schematic power supply 3.3v, 5v 15v flyback 5v 15v iso-1 15v iso-2 15v iso-3 5v ref 3.3v 15v 3.3v ref v in com v in com tms320lf2406a 40mips boot-en~ tm s tdi tdo tck trst- emu0 emu1 pd start / stop cantx canrx jtag/can interface connector th+ th- adcin4 ; 70 pwm1 ; 39 pwm2 ; 37 pwm3 ; 36 pwm4 ; 33 pwm5 ; 31 pwm6 ; 28 5v li n re g 400khz r2 + r2 - current sen se & level shifter adcin1 5v li n reg 400khz r3 + r3 - current sen se & level shifter 11khz adcin2 11khz 15v iso-2 5v 15v iso-3 5v gate drivers ir2214 based g6 e6 g3 e3 15v iso-1 15v 3.3v gate drivers ir2214 based g5 e5 g2 e2 15v iso-2 15v 3.3v gate drivers ir2214 based 15v iso-3 15v 3.3v hin li n hin li n hin li n g4 e4 g1 e1 c1 c4 c2 c5 c3 c6 adcin1 ; 77 adcin2 ; 74 adcin3 ; 72 pdpinta~ ; 6 adcin5 ; 69 dcb mon 22khz dc - 3.3v comp 3.3v 3.3v dc + rs485 line driver tx- tx + rx+ rx- opto- isolation spitxout spirxin spickout opto- isolation opto- isolation scitx ; 17 scirx ; 18 spisomi ; 22 qep1 ; 57 qep2 ; 55 vin iso gnd iso 5v iso 5v 5v 5v gnd iso spiclk ; 24 sincos1/qe1 homing/direction. sincos2/qe2 spisimo ;21 iopa2 ; 16 adcin7 ; 66 adcin6 ; 67 hall1 contactor hall2 hall3 - excitation cap3/tdirb ; 2 , 52 iopb6-tdira ; 11 cap4 ; 60 cap5 ;56 cap6/pwm7 ; 45 , 48 counter tclkinb ; 89 adcin adcin8 ; 80 de n.c. la tc h la tc h-reset~ fault~ fault~ faultmem~ pdpintb~ ; 95 eeprom i2c-clock iope3 ; 41 faultclr faultclr faultclr faultclr gate drivers ir2214 based cb gb eb 15v 3.3v pin on rs485 connector pin on jtag connector module connectors faultclr brakefault~ t3pwm ; 7 brakefault~ faultmem~ brakefault~ fault~ fault~ i2c-da ta 3.3v iope4 ; 38 iope2 ; 43 div li n la tc h-reset~ iopd0 ; 15 sci_tx_en watchdog wd 85 rs~ 93
www.irf.com page 3 pipm 30 p 06 d 009 i271 80 1 9 s e p t signal pins on rs485 connector signal pins on ieee1149.1 jtag connector caution: do not apply dc bus voltage when jtag interface is connected, severe damage may occur on power module and on your equipment! symbol lead description state connector pin number pd presence detect. indicates that the emulation cable is connected and that the piipm logic is powered up. pd is tied to the dsp 3.3v supply through a 1k resistor. output 3 homing / direction homing signal / counter direction input 4 start/stop start/stop signal input 5 can tx can transmitter signal output 6 can rx can receiver signal input 7 emu1/off~ emulation pin 1 i/o 8 counter counter signal output 9 emu0 emulation pin 0 i/o 10 trst~ jtag test reset input 13 symbol lead description state connector pin number tx+ rs485 trasmitter non inverting driver output output 1 tx- rs485 trasmitter inverting driver output output 2 rx- rs485 receiver inverting driver input input 3 rx+ rs485 receiver non inverting driver input, input 4 spickout spi clock output (gnd iso referenced) output 5 vin iso external 5v supply voltage for opto-couplers and line driver supply input 6 gnd iso extenal 5v supply ground reference for opto-couplers and line driver supply input 7 spitxout spi transmitter output (gnd iso referenced) output 8 spirxin spi receiver input (gnd iso referenced) input 10 sincos1 / qe1 sincos encoder input 1 / quadrature encoder input 1 input 11 sincos2 / qe2 sincos encoder input 2 / quadrature encoder input 2 input 12 contactor general purpose i/o i/o 13 hall1 hall effect sensor input 1 input 14 hall2 hall effect sensor input 2 input 15 hall3 / excitation hall effect sensor input 3 / resolver excitation i/o 16 vin external 15v supply voltage. internally referred to dc bus minus pin (dc -) input 17-18 com external 15v supply ground reference. this pin is directly connected to dc - input 19-20
www.irf.com page 4 pipm 30 p 06 d 009 i271 80 1 9 s e p t tms jtag test mode select input 14 tdo jtag test data output output 15 tdi jtag test data input input 16 tckret jtag test clock return. test clock input to the emulator. internally short circuited to tck. output 17 tck jtag test clock. tck is a 10mhz clock source from the emulation pod. this signal can be used to drive the system test clock. input 18 boot-en~ boot rom enable. this pin is sampled during dsp reset, pulling it low enables dsp boot rom through sci serial line at 40mhz operation (flash versions only). 47k internal pull up. input 19 adcin general purpose analog input input 20 com external 15v supply ground reference. this pin is directly connected to dc - input 1-11 vin external 15v supply voltage. internally referred to dc bus minus pin (dc-) input 2-12 following pins are intended for signal communication between driving board and power module only, though here described for completeness, they are on purpose not available to the user. symbol lead description pin number dc + dc bus plus input signal dc - dc bus minus input signal (internally connected to com) th + thermal sensor positive input th - thermal sensor negative input (internally connected to com) sh + dc bus minus series shunt positive input (kelvin point) sh - dc bus minus series shunt negative input (kelvin point) g1/2/3 gate connections for high side igbts e1/2/3 emitter connections for high side igbts (kelvin points) r1/2/3 + output current sensing resistor positive input (igbts emitters 1/2/3 side, kelvin points) r1/2/3 - output current sensing resistor negative input (motor side, kelvin points) g4/5/6 gate connections for low side igbts e4/5/6 emitter connections for low side igbts (kelvin points) gb gate connections for brake igbt eb emitter connection for brake igbt (kelvin point) brk collector connection for brake igbt (kelvin point) lateral connectors on embedded driving board
www.irf.com page 5 pipm 30 p 06 d 009 i271 80 1 9 s e p t power module frame pins mapping in1 in2 in3 out1 out2 out3 jtag conn. pin1 rs485 conn.
www.irf.com page 6 pipm 30 p 06 d 009 i271 80 1 9 s e p t absolute maximum ratings (t c =25oc) absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage parameters are absolute voltages referenced to v dc- , all currents are defined positive into any lead. thermal resistance and power dissipation ratings are measured at still air conditions. symbol parameter definition min. max. units v dc dc bus voltage 0 500 v ces collector emitter voltage 0 600 v i c @ 100c igbts continuous collector current (t c = 100 o c, fig. 1) 25 i c @ 80c igbts continuous collector current (t c = 80 o c,fig 1) 30 i c @ 25c igbts continuous collector current (t c = 25 o c,fig 1) 45 i cm pulsed collector current (fig. 3, fig. ct.5) 90 i f @ 100c diode continuous forward current (t c = 100 o c) 25 i f @ 25c diode continuous forward current (t c = 25 o c) 45 i fm diode maximum forward current 90 a v ge gate to emitter voltage -20 +20 v p d @ 25c power dissipation (one transistor) 138 inverter and brake p d @ 100c power dissipation (one transistor, t c = 100 o c) 55 w v rrm repetitive peak reverse voltage (t j = 150 o c) 1400 v rsm non repetitive peak reverse voltage 1500 v i o diode continuous forward current (t c = 100 o c, 120 o rect conduction angle ) 45 100% v rrm reapplied 225 i fsm one-cycle forward. non-r epetitive on state surge current (t=10ms, initial t j =150c) no voltage reapplied 270 a 100% v rrm reapplied 253 i 2 t current i 2 t for fusing (t=10ms, initial t j =150c) no voltage reapplied 365 a 2 s bridge i 2 t current i 2 t for fusing (t=0.1 to 10ms, no voltage reapplied, initial t j = 150c) 3650 a 2 s v in non isolated supply voltage (dc- referenced) -20 20 v in-iso isolated supply voltage (gnd iso referenced) -5 5.5 rx rs485 receiver input voltage (gnd iso referenced) -7 12 v t a--edb operating ambient temperature range -25 +70 t stg-edb board storage temperature range -40 +125 oc v iso-cont rs232 input-output continuous withstand voltage (rh 50%, -40c t a 85c ) ac dc 800 1000 embedded driving board v iso-temp rs232 input-output momentary withstand voltage (rh 50%, t = 1 min, t a = 25c) rms 2500 v mt mounting torque 3.5 nm t j operating junction temperature -40 +150 t stg storage temperature range -40 +125 oc power module vc-iso isolation voltage to base copper plate -2500 +2500 v
www.irf.com page 7 pipm 30 p 06 d 009 i271 80 1 9 s e p t electrical characteristics: inverter and brake for proper operation the device should be used within the recommended conditions. t j = 25c (unless otherwise specified) symbol parameter definition min. typ. max. units test conditions fig. v (br)ces collector to emitter breakdown voltage 600 v v ge = 0v, i c = 250 a ? v (br)ces / ? t temperature coeff. of breakdown volt age 0.67 v/ o c v ge = 0v, i c = 1ma (25 - 125 o c) 1.91 2.2 i c = 25a, v ge = 15v 5, 6 2.46 2.87 i c = 45a, v ge = 15v 7, 9 v ce(on) collector to emitter saturation voltage 2.19 2.55 v i c = 25a, v ge = 15v, t j = 125 o c 10, 11 v ge(th) gate threshold voltage 4 4.46 5 v v ce = v ge , i c = 250 a ? v ge(th) / ? tj temp. coeff. of threshold volt age -10 mv/ o c v ce = v ge , i c = 1ma (25 ? 125 o c) 12 g fe forward trasconductance 18 s v ce = 50v, i c = 30a 250 v ge = 0v, v ce = 600v 368 580 v ge = 0v, v ce = 600v, t j = 125 o c i ces zero gate voltage collector current 2000 a v ge = 0v, v ce = 600v, t j = 150 o c 1.29 1.48 i c = 25a v fm diode forward voltage drop 1.25 1.5 v i c = 25a, t j = 125 o c 8 i ges gate to emitter leakage current 100 na v ge = 20v r1/2/3 sensing resistors 4.95 5 5.05 m ? electrical characteristics: bridge for proper operation the device should be used within the recommended conditions. t j = 25c (unless otherwise specified) symbol parameter definition min. typ. max. units test conditions fig. v fm forward voltage drop 1.45 v t p = 400 s, i pk = 45a 24 v f(to) threshold voltage 0.78 v t j = 125 o c i rm reverse leakage current 5 ma t j = 125 o c v r = 1200v
www.irf.com page 8 pipm 30 p 06 d 009 i271 80 1 9 s e p t switching characteristics: inverter and brake for proper operation the device should be used within the recommended conditions. t j = 25c (unless otherwise specified) symbol parameter definition min typ max units test conditions fig. q g total gate charge (turn on) 102 153 q ge gate ? emitter charge (turn on) 14 21 q gc gate ? collector charge (turn on) 44 66 nc i c = 30a v cc = 400v v ge = 15v 23 ct1 e on turn on switching loss 0.469 0.779 i c = 30a, v cc = 400v, t j = 25 o c ct4 e off turn off switching loss 0.338 0.507 v ge = 15v, r g =10 ?, l = 800 h wf1 e tot total switching loss 0.807 1.281 mj tail and diode rev. recovery included wf2 e on turn on switching loss 0.631 0.946 e off turn off switching loss 0.604 0.906 e tot total switching loss 1.235 1.852 mj i c = 30a, v cc = 400v, t j = 125 o c v ge = 15v, r g =10 ?, l = 800 h tail and diode rev. recovery included 13, 15 ct4 wf1 wf2 td (on) turn on delay time 101 152 14,16 tr rise time 25 38 i c = 30a, v cc = 400v, t j = 125 o c ct4 td (off) turn off delay time 130 195 wf1 tf fall time 105 156 ns v ge = 15v, r g =10 ?, l = 800 h wf2 c ies input capacitance 1750 v cc = 30v c oes output capacitance 160 v ge = 0v c res reverse transfer capacitance 60 pf f = 1mhz 22 t j = 150 o c, i c =90a, v ge = 15v to 0v rbsoa reverse bias safe operating area full square v cc = 500v, v p = 600v, r g = 10 ? 4 ct2 t j = 150 o c, v ge = 15v to 0v ct3 scsoa short circuit safe operating area 10 s v cc = 360v, vp= 600v, r g = 10 ? wf4 e rec diode reverse recovery energy 925 1165 j t j = 125 o c trr diode reverse recovery time 77 ns i f = 30a, v cc = 400v, irr peak reverse recovery current 62 93 a v ge = 15v, r g =10 ?, l = 800 h 17,18 19,20 21 ct4 wf3 rth j-c_t each igbt to copper plate thermal resistance 0.806 0.9 o c/w rth j-c_d each diode to copper plate thermal resistance 1.06 1.22 o c/w rth c-h module copper plate to heat sink thermal resistance. silicon grease applied = 0.1mm 0.03 o c/w see also fig. 25 and 26 23 i c = 3.3a, v dc = 300v, fsw = 8khz, t c = 55 o c 40 i c = 6a, v dc = 300v, fsw = 8khz, t c = 55 o c 61 i c = 6a, v dc = 300v, fsw = 16khz t c = 55 o c, pdiss total dissipated power 95 w i c = 14a, v dc = 300v, fsw = 4khz, t c = 55 o c pd1 pd2 pd3
www.irf.com page 9 pipm 30 p 06 d 009 i271 80 1 9 s e p t electrical characteristics: embedded driving board (edb) communication ports for proper operation the device should be used within the recommended conditions. vin = 15v, vin-iso = 5v, t a = 0 to 55c, t c = 75c (unless otherwise specified) ~ indicates active low signals symbol parameter definition min. typ. max. units test conditions type conn. vin edb input supply voltage 12 15 18 v isupp edb input supply current 150 250 ma v dc = 350v, f pwm = 16khz non isolated suppy vin iso edb isolated supply voltage 4.5 5 5.5 v iq. iso edb isolated quiescent supply current 9 15 ma rx+ = +5v, rx- = 0v spirxin open 10 15 22 ma spirxin low rx+ = 0v, rx- = +5v tx+ and tx- open isupp. iso edb isolated supply current 50 55 62 ma spirxin low rx+ = 0v, rx- = +5v tx+ and tx- on 120 ? isolated supply v do-tx differential driver output voltage 2 v v co-tx driver common mode output voltage 3 v rload = 120 ? v di-rx receiver input differential threshold voltage - 0.2 0.2 v r in-rx receiver input resistance 120 ? - 7v v cm +12v f max rs485 maximum data rate 2.5 mbps rs485 port logic high input voltage 3.8 v logic low input voltage 1.0 v spirxin logic low input current -5 ma 0,8 v iout = -510 a logic low output voltage 1,2 v iout = -1,2ma spitxout spickout logic high output voltage 2.4 v iout = 3ma spi port rs485 tms,tdi,tdo tck,trst- emu0 emu1/off~ pd jtag interface pins ( caution: do not apply dc bus voltage when jtag interface is connected, sever damage may occur on power module and on your equipment!) please see tms320lf2406a datasheet from texas instruments and v pd specifications directly connected from dsp to connector pins. emu0 and emu1 with 4.7k internal pull up. jtag v pd presence detect voltage 3.2 3.3 3.4 v i pd = -100 a jtag v boot en~ boot rom enable input voltage 0.5 v i boot-en~ boot rom enable input current - 100 a active low jtag logic low output voltage 0.8 v iout = - 780 a can tx logic high output voltage 2.4 v iout = 860 a logic low input voltage 0.8 v can rx logic high input voltage 2.4 v can port jtag
www.irf.com page 10 pipm 30 p 06 d 009 i271 80 1 9 s e p t ac electrical characteristics: embedded driving board (edb) dsp pins mapping for proper operation the device should be used within the recommended conditions. vin = 15v, vin-iso = 5v, t a = 0 to 55c, t c = 75c (unless otherwise specified) symbol parameter definition min. typ. max. units test conditions dsp name; pin n v dcgain dc bus voltage feedback partition coefficient 5.27 5.47 5.57 mv/v v dcpole dc bus voltage feedback second order filter - 22 - khz adcin03 ; 72 v dc-ovth dc bus voltage over-voltage threshold 385 410 435 v pdpinta~ ; 6 v th25c thermal sensor voltage feedback at 25 o c (fig. tf1) 2.65 2.75 2.85 v v th100c thermal sensor voltage feedback at 100 o c (fig. tf1) 1.04 1.09 1.14 v adcin04 ; 70 vin-gain input voltage feedback partition coefficient 125 128 131 mv/v vin-pole input voltage feedback filter pole 1600 1700 1800 hz adcin05 ; 69 iph- gain current feedback gain 39 40 41 mv/a iph- pole current feedback filter pole 9.8 10.9 12 khz iph- lat current feedback signal delay 5 s iph- zero zero current input voltage level 1.62 1.65 1.68 v all two phases adcin01: 77 adcin02: 74 vce_sc vce short circuit threshold detection 7.4 v i sc-del short circuit detection delay time 3 6 s all phases pdpinta~ ; 6 wd external watchdog timeout (see also rs~ signal) 0.9 1.6 2.5 sec iopc1 ; 85 generic purpose analog input 0 3.3 v adcin generic purpose analog input filter pole 4.13 khz adcin08 ; 80 analog input 1 for sincos resolver 0 3.3 v analog input for sincos resolver filter pole 4.13 khz adcin06 ; 67 high level threshold 2.4 v sincos1/qe1 qep1: internal digital signal of qe1 low level threshold 1 v see also qep1 signal qep1 ; 57 analog input 2 for sincos resolver 0 3.3 v analog input for sincos resolver filter pole 4.13 khz adcin07;66 high level threshold 2.4 v sincos2/qe2 qep2: internal digital signal of qe2 low level threshold 1 v see also qep2 signal qep2 ; 55 com dsp ground 3, 5, 13, 14, 19, 26, 27, 29, 32, 34, 46, 53,55, 58, 63, 65, 68, 71, 73, 75, 76, 78,79, 81, 84, 90, 97 3.3v dsp 3.3v supply 4, 10, 20, 30, 35, 47, 54, 59, 64, 91, 98 floating not connected to anything 12, 23, 88, 25, 42, 44, 51 ~ indicates active low signals
www.irf.com page 11 pipm 30 p 06 d 009 i271 80 1 9 s e p t other dsp pins mapping to the connector symbol signal definition dsp name ; pin n comments connector hall1 hall effect sensor input 1 cap4/qep3/iope7 ; 60 digital input. see elec. characteristic of i/o pins hall2 hall effect sensor input 2 cap5/qep4/iopf0 ; 56 digital input. see elec. characteristic of i/o pins hall3 / excitation hall effect sensor input 3 / resolver excitation pwm7/iope1, cap6/iopf1 ; 45, 48 digital i/o, output is type g3. see electrical characteristics of i/o pins contactor general purpose i/o iopb6 ; 11 digital i/o, output is type g3. see electrical characteristics of i/o pins rs485 can tx can transmit data cantx ; 50 not isolated can rx can receive data canrx ; 49 not isolated homing/direction homing signal/ counter direction tdirb/iopf4, cap3/iopa5 ;2, 52 avoid electrical conflicts beetwen these two pins start/stop start/stop signal iopf6 ; 92 digital input. see elec. characteristic of i/o pins boot en~ boot rom enable signal boot_en~ ; 86 see also edb electrical characteristics counter counter signal tclkinb ; 89 digital input. see elec. characteristics of i/o pins jtag these signals are internal only symbol signal definition dsp name ; pin n comments pwm1 out 1 high side igbt gate drive signal pwm1; 39 dsp event manager a output pwm2 out 1 low side igbt gate drive signal pwm2 ; 37 dsp event manager a output pwm3 out 2 high side igbt gate drive signal pwm3 ; 36 dsp event manager a output pwm4 out 2 low side igbt gate drive signal pwm4 ; 33 dsp event manager a output pwm5 out 3 high side igbt gate drive signal pwm5 ; 31 dsp event manager a output pwm6 out 3 low side igbt gate drive signal pwm6 ; 28 dsp event manager a output brake brake igbt gate drive signal iopf2 ; 7 dsp event manager b output spitxout spitx output spisimo ; 21 spirxout spirx input spisomi ; 22 spickout spiclk output spiclk ; 24 these signal are optically isolated. see also edb electrical characteristics ref3.3v 3.3v reference voltage vrefhi, vcca ; 82, 83 3.3v reference and supply voltage for adc converter 5v supp. flash programming voltage pin vccp ; 40 supplied by the embedded flyback regulator tx sci transmit data scitxd ; 17 drives tx+ and tx- through the opto-isolator and the line driver rx sci receive data scirxd ; 18 driven by rx+ and rx- through the opto-isolator and the line driver sci_tx_en sci transmitter enable iopa2 ; 16 enable a line driver through an opto-isolator latch-reset~ system general fault output reset signal iopd0 ; 15 lfault reset signal, to be activated via software after a fault or system boot, active low. faultclr gate driver fault output reset signal iope3 ; 41 gate driver reset, to be activated via software after a short-circuit or system boot
www.irf.com page 12 pipm 30 p 06 d 009 i271 80 1 9 s e p t rs~ dsp reset input signal (see also wd signal) rs~ ; 93 forces a dsp reset if wd signal holds too long (see also edb electrical char.) xtal1 pll oscillator input pin xtal1 ; 87 a 10mhz oscillator at 100ppm frequency stability feeds this pin. pllf1 pll filter input 1 pffl ; 9 pll filter for 40mhz dsp clock frequency pllf2 pll filter input 2 pllf2 ; 8 pll filter for 40mhz dsp clock frequency faultmem~ system general fault input pdpinta~ ; 6 activated by short circuits on output phases or brake igbtand by dc bus over-voltage comparator. latched signal, see also latch-reset brakefault~ brake protection interrupt signal pdpintb~ ; 95 activated by short circuits on brake qep1 square wave of sincos1/qe1 qep1 ; 57 internal schmitt trigger, see also ac electrical characteristic qep2 square wave of sincos2/qe2 qep2 ; 55 internal schmitt trigger, see also ac electrical characteristic wd = high impedance, external watchdog is disabled wd output signal for external watchdog iopc1 ; 85 wd = high or wd = low, external watchdog is enabled and wd has to be periodically triggered by positive or negative transition. when the supervising system fails to retri gger the ext. watchdog within the time shown on ac electrical characteristics, rs~ signal becomes active. ~ indicates active low signals 64kbits i 2 c eeprom (please see microchip 24lc4 for more specifications) symbol signal definition dsp name ; pin n comments i 2 c - clock i 2 c - clock iope2 ; 43 connected to the i 2 c eeprom i 2 c - data i 2 c - clock iope4 ; 38 connected to the i 2 c eeprom electrical characteristic of digital inputs and outputs. symbol parameter definition min. typ. max. units test conditions input: vih logic high,generic input voltage 2.4 v input: vil logic low, generic input voltage 0.8 v output type g1 (*) voh 2.4 v iout = 700 a vol 0.8 v iout = - 700 ? output type g2 (*) voh 2.4 v iout = 850 ? vol 0.8 v iout = - 850 ? output type g3 (*) voh 2.4 v iout = 950 a vol 0.8 v iout = -950 ? (*) please refer to tms320lf2406a datasheet from texas instruments for more specifications.
www.irf.com page 13 pipm 30 p 06 d 009 i271 80 1 9 s e p t fig. 1 ? maximum dc collector current vs. case temperature fig. 2 ? power dissipation vs. case temperature t c = (oc) t c = (oc) fig. 3 ? forward soa t c = 25oc; tj 150oc fig. 4 ? reverse bias soa tj = 150oc, v ge = 15v v ce = (v) v ce = (v)
www.irf.com page 14 pipm 30 p 06 d 009 i271 80 1 9 s e p t fig. 5 ? typical igbt output characteristics tj = - 40oc; tp = 500 s fig. 6 ? typical igbt output haracteristics tj = 25oc; tp = 500 s v ce = (v) v ce = (v) fig. 7 ? typical igbt output characteristics tj = 125oc; tp = 500 s fig. 8 ? typical diode forward characteristics tp = 500 s v ce = (v) v f = (v )
www.irf.com page 15 pipm 30 p 06 d 009 i271 80 1 9 s e p t fig. 9 ? typical v ce vs. v ge tj = - 40oc fig. 10 ? typical v ce vs. v ge tj = 25oc v ge = (v) v ge = (v) fig. 11 ? typical v ce vs. v ge tj = 125oc fig. 12 ? typical transfer characteristics v ce = 20v; tp = 20 s v ge = (v) v ge = (v)
www.irf.com page 16 pipm 30 p 06 d 009 i271 80 1 9 s e p t fig. 13 ? typical energy loss vs. i c tj = 125oc; l = 800 h; v ce = 400v; rg = 10 ?; v ge = 15v fig. 14 ? typical switching time vs. i c tj = 125oc; l = 800 h; v ce = 400v; rg = 10 ?; v ge =15v i c = (a) i c = (a) fig. 15 ? typical energy loss vs. rg tj = 125oc; l = 800 h; v ce = 400v; i ce = 30a ; v ge = 15v fig. 16 ? typical switching time vs. rg tj = 125oc; l = 800 h; v ce = 400v; i ce = 30a ; v ge = 15v rg = ( ? ) rg = ( ? )
www.irf.com page 17 pipm 30 p 06 d 009 i271 80 1 9 s e p t fig. 17 ? typical diode i rr vs. i f tj = 125oc fig. 18 ? typical diode i rr vs. rg i f = 30a; tj = 125oc i f = (a) rg = ( ? ) fig. 19 ? typical diode i rr vs. di f /dt v dc = 400v; v ge = 15v; i f = 30a; tj = 125oc fig. 20 ? typical diode q rr v dc = 400v; v ge = 15v; tj = 125oc di f /dt (a/ s ) di f /dt (a/ s )
www.irf.com page 18 pipm 30 p 06 d 009 i271 80 1 9 s e p t fig. 21 ? typical diode e rec vs. i f tj = 125oc fig. 22 ? typical capacitance vs. v ce v ge = 0v; f = 1mhz i f = (a) vce = (v) fig. 23 ? typical gate charge vs. v ge i c = 30a; l = 600 h; v cc = 400v fig. 24 ? on state voltage drop characteristic v fm vs i f t p = 400 s q g = (nc) v fm = (v)
www.irf.com page 19 pipm 30 p 06 d 009 i271 80 1 9 s e p t fig. 25 ? normalized transient thermal impedance, junction-to-copper plate (igbts) t1, rectangular pulse duration (sec) fig. 26 ? normalized transient impedance, junction-to-copper plate (fred diodes) t1, rectangular pulse duration (sec)
www.irf.com page 20 pipm 30 p 06 d 009 i271 80 1 9 s e p t
www.irf.com page 21 pipm 30 p 06 d 009 i271 80 1 9 s e p t
www.irf.com page 22 pipm 30 p 06 d 009 i271 80 1 9 s e p t fig. pd1 ? total dissipated power vs. f sw iout rms = 3.3a, v dc = 300v, t c = 55oc fig. pd2 ? total dissipated power vs. f sw iout rms = 6a, v dc = 300v, t c = 55oc f sw = (khz) f sw = (khz) fig. pd3 ? total dissipated power vs. f sw iout rms = 14a, v dc = 300v, t c = 40oc fig. tf1 ? thermal sensor voltage feedback vs. base-plate temperature f sw = (khz) t c (oc)
www.irf.com page 23 pipm 30 p 06 d 009 i271 80 1 9 s e p t piipm family part number identification
www.irf.com page 24 pipm 30 p 06 d 009 i271 80 1 9 s e p t top board suggested footprint (top view) rs485 and jtag connectors top view these connectors do not have any orientation tag; please check their pin 1 position on power module frame pins mapping before inserting mate part. molex 53916-0204 mates with 54167-0208 or 52991-0208
www.irf.com page 25 pipm 30 p 06 d 009 i271 80 1 9 s e p t PIIPM30P06D009 case outline and dimensions data and specifications subject to change without notice this product has been designed and qualified for industrial level. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, tel: (310) 3252 7105 tac fax: (310) 252 7309 visit us at www.irf.com for sales contact information 19 - sept data and specifications subject to change without notice. sales offices, agents and distributors in major cities throughout the world. ? 2003 international rectifier - printed in italy 09-19 - rev. 2.7


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